Title: A 82% Efficiency 0.5% Ripple 16-Phase Fully Integrated Capacitive Voltage Doubler
Authors: Van Breussegem, Tom ×
Steyaert, Michel #
Issue Date: 2009
Host Document: Proceedings of the 2009 Symposium on VLSI Circuits pages:198-199
Conference: Symposium on VLSI Circuits edition:22 location:Kyoto date:16-18 June 2009
Abstract: A fully integrated voltage doubler is presented. Using a 16-phase switching strategy, the output voltage ripple is reduced to less then 0.5% of the output voltage. To the author's knowledge, the peak efficiency and nominal efficiency of this voltage doubler, respectively 82% and 79%, exceed the efficiency of any known fully integrated converter, inductive as well as capacitive. The converter is fabricated in a 130nm CMOS process.
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors
× corresponding author
# (joint) last author

Files in This Item:
File Description Status SizeFormat
VLSI_paper14.pdfMain article Published 222KbAdobe PDFView/Open


All items in Lirias are protected by copyright, with all rights reserved.

© Web of science