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Acs Nano

Publication date: 2018-07-01
Volume: 12 Pages: 7039 - 7047
Publisher: American Chemical Society

Author:

Resta, Giovanni V
Balaji, Yashwanth ; Lin, Dennis ; Radu, Iuliana P ; Catthoor, Francky ; Gaillardon, Pierre-Emmanuel ; De Micheli, Giovanni

Keywords:

Science & Technology, Physical Sciences, Technology, Chemistry, Multidisciplinary, Chemistry, Physical, Nanoscience & Nanotechnology, Materials Science, Multidisciplinary, Chemistry, Science & Technology - Other Topics, Materials Science, two-dimensional semiconductor, WSe2, electrostatic doping, polarity control, reconfigurable, logic gates, standard cell library, FIELD-EFFECT TRANSISTOR, NANOWIRE TRANSISTORS, ELECTRONICS, CIRCUITS

Abstract:

Atomically thin two-dimensional (2D) materials belonging to transition metal dichalcogenides, due to their physical and electrical properties, are an exceptional vector for the exploration of next-generation semiconductor devices. Among them, due to the possibility of ambipolar conduction, tungsten diselenide (WSe2) provides a platform for the efficient implementation of polarity-controllable transistors. These transistors use an additional gate, named polarity gate, that, due to the electrostatic doping of the Schottky junctions, provides a device-level dynamic control of their polarity, that is, n- or p-type. Here, we experimentally demonstrate a complete doping-free standard cell library realized on WSe2 without the use of either chemical or physical doping. We show a functionally complete family of complementary logic gates (INV, NAND, NOR, 2-input XOR, 3-input XOR, and MAJ) and, due to the reconfigurable capabilities of the single devices, achieve the realization of highly expressive logic gates, such as exclusive-OR (XOR) and majority (MAJ), with fewer transistors than possible in conventional complementary metal-oxide-semiconductor logic. Our work shows a path to enable doping-free low-power electronics on 2D semiconductors, going beyond the concept of unipolar physically doped devices, while suggesting a road to achieve higher computational densities in two-dimensional electronics.