Author:

Abstract:

© 2014 by Taylor & Francis Group, LLC. Since a few years, the microelectronic world is experiencing a revolution. For >20 years, electronics has been dominated by one material (Si) and one architecture (metal oxide-semiconductor field-effect transistor), despite the presence of bipolar junction transistor (BJT) and the use of III-V semiconductors for some specific applications. However, in order to tackle the new challenges in terms of miniaturization, power consumption, power density, and processing speed, new inorganic semiconductor materials (Ge, InP, InGaAs, GaN, SiC, etc.) and new 3D architectures (multiple gates FETs, nanowire TFETs, etc.) are developed and progressively introduced. The two main goals of this revolution are to overcome the current limitations in terms of mobility (in order to increase the operational speed of the devices) and of junction leakage (in order to reduce the power consumption). These new architectures are typically three-dimensional and involve multiple materials. With the continuous decrease of dimensions, they also represent extremely confined volumes into which statistics and quantum effects start to play an increasing role. Beyond the standard logic/memory applications, there is also a very strong increase in More than Moore developments targeting energy (photovoltaic, energy storage), imaging (e.g., quantitative medical imaging), sensor/actuators linked to CMOS base circuitry, biochips, etc. In all these cases, the dopant/carrier distribution still plays a dominant role necessitating adequate 3D fabrication and metrology concepts.