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Keywords:

0204 Condensed Matter Physics, 0906 Electrical and Electronic Engineering, 1099 Other Technology, Electrical & Electronic Engineering, 4009 Electronics, sensors and digital hardware

Abstract:

A CMOS power amplifier with a novel class AB rail-to-rail output stage is presented. By using a three-stage amplifier with double Miller compensation, the harmonic distortion of the output stage is suppressed by the internal feedback loops. This approach is thoroughly investigated in this paper and it is shown that a three-stage amplifier has apparent advantages for dc gain, harmonic distortion, and PSRR. A realized prototype for ISDN applications will be presented with a gain bandwidth (GBW) of 5 MHz and with -80-dB THD at 10 kHz for an output current of 20 mA in a load of 81 Ω. © 1990 IEEE