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Abstract:

Analog integrated circuits can handle the reduction of the supply voltage down to 1 V is discussed. Existing solutions for low supply voltages include the reduction of threshold voltages from 0.7 V to 0.3-0.4 V and the use of voltage multipliers. It is possible to reduce supply voltages to 1 V in standard CMOS without voltage multipliers. The advent of deep submicron CMOS dictates reduced supply voltage which forces current consumption to increase for several reasons which are: square law relationship vanishes for deep submicron transitions; signal levels are reduced in the reduction of supply voltages; dedicated low-voltage circuit techniques can be classified as rail-to-rail input stages, pseudo-differential stages, and current differential schemes.