Proceedings IEEE VLSI-TSA International Symposium on VLSI Technology, Date: 2005/04/25 - 2005/04/27, Location: Leuven Belgium
2005 IEEE VLSI-TSA INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY (VLSI-TSA-TECH), PROCEEDINGS OF TECHNICAL PAPERS
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Keywords:
Science & Technology, Technology, Physical Sciences, Engineering, Electrical & Electronic, Instruments & Instrumentation, Physics, Condensed Matter, Engineering, Physics
Abstract:
NMOS and PMOS triple gate FETs with a single mid-gap TaN gate electrode have been fabricated. This work demonstrates for the first time triple gate transistors with a high-k gate dielectric and metal gate electrode that gives more than 3 orders of magnitude lower gate leakage at comparable performance to an oxynitride-metal gate stack. A gate etch capable of removing the TaN electrode on the vertical sidewalls and underneath the active fins is demonstrated. Transistors with fin widths of 50nm yield symmetric threshold voltages in the range of 0.35V to 0.55V demonstrating that a single mid-gap metal is compatible with advanced multiple gate FET architectures. The devices with HfO2-TaN gate stack exhibit a very low gate current density of 9×10-3 A/cm2 at Tox-inv = 2.1 nm. © 2005 IEEE.