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IEEE International Solid-State Circuits Conference, Date: 2012/02/01 - 2012/02/01

Publication date: 2012-02-01
Volume: 55 Pages: 62 - 63
ISSN: 9781467303736
Publisher: IEEE

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Author:

Lakdawala, Hasnain
Schaecher, Mark ; Fu, Chang-tsung ; Limaye, Rahul ; Duster, Jon ; Tan, Yulin ; Balankutty, Ajay ; alpmann, Erkan ; Lee, Chun C ; Suzuki, Satoshi ; Carlton, Brent ; Kim, Hyung Seok ; Verhelst, Marian ; Kim, Tong ; Vengkatesan, Durgesh ; Vandervoorn, Peter ; Rizk, Jad ; Jan, Chia-Hong ; Soumyanath, Krishnamurthy ; Ramamurthy, Sunder

Abstract:

Embedded PC applications are growing, driven by their cost, performance and software compatibility. The SoC described in this work is a unique device designed for rapid integration and customization for specific market segments. A rich multi-source IP eco-system consisting of standardized interfaces, modular and configurable building blocks, enables automation and fast execution to deliver a broad range of targeted solutions. Integrating high-performance digital circuits with analog and RF circuits on a leading edge process enables our SoC architecture to increase the level of integration, performance and reduce the cost of the platform. WiFi has remained an external PC component due to the challenges of managing system noise from the digital circuits. This paper presents an integrated standard x86 OS compliant, dual-core ATOM® processor-based SoC, including the RF WiFi to drive down platform cost. Key enabling features are: (a) a 32nm RF process with HV transistors and RF passives; (b) an on-chip interconnect fabric for modularity; (c) a clock generator with SSC to reduce substrate noise injection and EMI; (d) voltage regulators for power management and rail reduction; (e) an 802.11b/g RF WiFi transceiver with integrated LNA, PA, T/R switch and BIST/calibration engine. © 2012 IEEE.