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International Electron Device Meeting - IEDM, Date: 2014/12/15 - 2014/12/17, Location: San Francisco, CA USA

Publication date: 2014-12-01
Volume: 2015-February Pages: 828 - 831
Publisher: Institute of Electrical and Electronics Engineers

International Electron Device Meeting - IEDM

Author:

Groeseneken, Guido
Franco, Jacopo ; Cho, Moon Ju ; Kaczer, Ben ; Toledano Luque, Maria ; Roussel, Philippe ; Kauerauf, Thomas ; Alian, AliReza ; Mitard, Jerome ; Arimura, Hiroaki ; Lin, Dennis ; Waldron, Niamh ; Sioncke, Sonja ; Witters, Liesbeth ; Mertens, Hans ; Ragnarsson, Lars-Ake ; Heyns, Marc ; Collaert, Nadine ; Thean, Aaron ; Steegen, An

Keywords:

Science & Technology, Technology, Computer Science, Theory & Methods, Engineering, Electrical & Electronic, Computer Science, Engineering, TECHNOLOGY SUPERIOR RELIABILITY

Abstract:

© 2014 IEEE. Our present understanding of BTI in Si and (Si)Ge based sub 1-nanometer EOT MOSFET devices is reviewed and extended to benchmark other Beyond-Si based devices. We discuss the evolution of NBTI for Si-based pMOS devices as a possible showstopper for further scaling below 1nm EOT. Then we present the BTI reliability framework which was developed for SiGe based MOSFET devices, showing strongly improved BTI reliability, explained by carrier-defect decoupling. Also the important issue of increasing stochastic behavior and time dependent variability is discussed. Based on the presented framework developed for SiGe stacks we benchmark alternative Beyond-Si gate stacks using a metric for carrier-defect decoupling, allowing to screen stacks for acceptable reliability.