IEEE Journal of Solid-State Circuits vol:36 issue:3 pages:315-324
In this paper, a 10-bit 1-GSample/s current-steering CMOS digital-to-analog (D/A) converter is presented: The measured integral nonlinearity is better than +/-0.2 LSB and the measured differential nonlinearity lies between -0.08 and 0.14 LSB proving the 10-bit accuracy,. The 1-GSample/s conversion rate has been obtained by an, at transistor level, fully custom-designed thermometer decoder and synchronization circuit, The layout has been carefully optimized. The parasitic interconnect loads have been estimated and have been iterated in the circuit design. A spurious-free dynamic range (SFDR) of more than 61 dB has been measured in the interval from de to Nyquist, The power consumption equals 110 mW for a near-Nyquist sinusoidal output signal at a 1-GHz clock. The chip has been processed in a standard 0.35-mum CMOS technology and has an active area of only 0.35 mm(2).