We present an investigation of junction leakage in highly doped n(+)/p-junctions, fabricated in strained silicon/relaxed SiGe substrates. The leakage is shown to scale linearly with the threading dislocation density of the virtual substrate, which allows to estimate minority carrier generation lifetimes in good agreement with literature values. Even the highest-defective substrates in this work give a junction leakage density below 100 mA/cm(2), and are not expected to significantly increase the power consumption of metal-oxide-semiconductor field-effect transistor (MOSFET) technologies. Threading dislocations will increase the junction leakage by similar to 1 nA in a small number of transistors in MOSFET circuits, but are not expected to have a negative impact on yield. (C) 2005 American Institute of Physics.