Title: A 5.6-mW 1-Gb/s/pair pulsed signaling transceiver for a fully AC coupled bus
Authors: Kim, J ×
Verbauwhede, Ingrid
Chang, MCF #
Issue Date: 2005
Publisher: IEEE
Series Title: IEEE Journal of Solid-State Circuits vol:40 issue:6 pages:1331-1340
Abstract: This paper describes a low-power synchronous pulsed signaling scheme on a fully ac coupled multidrop bus for board-level chip-to-chip communications. The proposed differential pulsed signaling transceiver achieves a data rate of 1 Gb/s/pair over a 10-cm FR4 printed circuit board, which dissipates only 2.9 mW (2.9 pJ/bit) for the driver and channel termination and 2.7 mW for the receiver pre-amplifier at 500 MHz. The fully ac coupled multipoint bus topology with high signal integrity is proposed that minimizes the effect of inter-symbol interference (ISI) and achieves a 3 dB corner frequency of 3.2 GHz for an 8-drop PCB trace. The prototype transceiver chip is implemented in a 0.10-mu m 1.8-V CMOS DRAM technology and packaged in a WBGA. It occupies an active area of 330 X 85 mu m(2).
ISSN: 0018-9200
Publication status: published
KU Leuven publication type: IT
Appears in Collections:ESAT - COSIC, Computer Security and Industrial Cryptography (+)
× corresponding author
# (joint) last author

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