Title: Secure logic synthesis
Authors: Tiri, K
Verbauwhede, Ingrid
Issue Date: 2004
Publisher: Springer-Verlag
Host Document: Lecture Notes in Computer Science vol:3203 pages:1052-1055
Conference: FPL 2004 date:August 30 - September 01, 2004
Abstract: This paper describes the synthesis of dynamic differential logic to increase the resistance of FPGAs against Differential Power Analysis. Compared with an existing technique, it saves more than a factor 2 in slice utilization. Experimental results indicate that a secure version of the AES algorithm can now be implemented with a mere doubling of the slice utilization when compared with a normal non-secure single ended implementation.
ISSN: 0302-9743
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - COSIC, Computer Security and Industrial Cryptography (+)

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