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Keywords:

buffer circuits, cmos integrated circuits, high-voltage techniques, i/o, Science & Technology, Technology, Engineering, Electrical & Electronic, Engineering, CMOS integrated circuits, I/O, 0204 Condensed Matter Physics, 0906 Electrical and Electronic Engineering, 1099 Other Technology, Electrical & Electronic Engineering, 4009 Electronics, sensors and digital hardware

Abstract:

The design of a high-voltage output driver in a digital 0.25-mu m 2.5-V technology is presented. The use of stacked devices with a self-biased cascode topology allows the driver to operate at three times the nominal supply voltage. Oxide stress and hot carrier degradation is minimized since the driver operates within the voltage limits imposed by the design rules of a mainstream CMOS technology. The proposed high-voltage architecture uses a switching output stage.