Title: The impact of layout on stress-enhanced transistor performance
Authors: Moroz, Victor ×
Eneman, Geert
Verheyen, Peter
Nouri, Faran
Washington, Lori
Smith, Lee
Jurczak, Malgorzata
Pramanik, Dipu #
Issue Date: 2005
Publisher: IEEE
Host Document: pages:143-146
Conference: Proceedings of the International Conference on Simulation of Semiconductor Processes and Devices - SISPAD date:01/09/05
Publication status: published
KU Leuven publication type: IC
Appears in Collections:Associated Section of ESAT - INSYS, Integrated Systems
× corresponding author
# (joint) last author

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