Title: Clock Skew Optimization Methodology for Substrate Noise Reduction with Supply Current Folding
Authors: Badaroglu, Mustafa ×
Tiri, Kris
Van der Plas, Geert
Wambacq, Piet
Verbauwhede, Ingrid
Donnay, Stephane
Gielen, Georges
De Man, Hugo #
Issue Date: 2006
Publisher: IEEE
Series Title: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol:25 issue:6 pages:1146-1154
ISSN: 0278-0070
Publication status: published
KU Leuven publication type: IT
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors
Associated Section of ESAT - INSYS, Integrated Systems
ESAT - COSIC, Computer Security and Industrial Cryptography (+)
× corresponding author
# (joint) last author

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