ISCAS 2018, Date: 2018/05/27 - 2018/05/30, Location: Florence, Italy
IEEE International Symposium on Circuits and Systems (ISCAS 2018)
Author:
Keywords:
Science & Technology, Technology, Engineering, Electrical & Electronic, Engineering, iMinds, Cathedral - 695305;info:eu-repo/grantAgreement/EC/H2020/695305, C16/15/058#53326573
Abstract:
© 2018 IEEE. This paper presents a refined stochastic model of the delay-chain based true random number generator (DC-TRNG) and its application. DC-TRNG is a true random number generator for FPGAs that utilizes time-to-digital conversion (TDC) to accurately determine the position of the ring-oscillator jittery signal edge. Our stochastic model employs precise time characterization of the carry-chains that are used for TDC in the DC-TRNG. In order to determine lower bounds of the estimated min-entropy, the binary probabilities are calculated by applying the stochastic model. Based on these computed probabilities, we perform optimizations of the DC-TRNG parameters on two different FPGAs - Xilinx Spartan 6 and Intel Cyclone IV, in order to achieve the highest possible throughput of the DC-TRNG.