IEEE Journal of Solid-State Circuits vol:33 issue:7 pages:1090-1095
This paper presents a high-speed, small-area circuit specifically designed to identify the levels in the read-out operation of a Flash multilevel memory. The circuit is based on the analog computation of the Euclidean distance between the current read out from a memory cell and the reference currents that represent the different logic levels. An experimental version of the circuit has been integrated in a standard double-metal 0.7-mu m CMOS process with a die area of only 140 x 100 mu m(2). Operating under a 5-V power supply, this circuit identifies the read-out current of a memory cell, and associates it with the appropriate logic level in 9 ns.