Topical Workshop on Electronics for Particle Physics location:Marseille date:22-26 September 2014
A radiation hardened Time-to-Digital Converter (TDC) has been designed with < 10 ps single-shot resolution using resistive interpolation. The TDC uses a DLL based control loop to calibrate gate delays to a reference clock. The control loop uses a novel low bandwidth Bang-Bang phase detector in combination with a high bandwidth dead-zone PFD for fast recovery after single-event strikes. The Bang-Bang phase detector has internal self-calibration for total dose radiation hardening. Finally an adapted flip-flop is used in the time capture registers that has no data dependent delay to improve overall resolution.