Title: Ultra-Low Voltage Datapath Blocks in 28nm UTBB FD-SOI
Authors: Reyserhove, Hans
Reynders, Nele
Dehaene, Wim
Issue Date: Nov-2014
Publisher: Institute of Electrical and Electronics Engineers
Host Document: Proceedings of the IEEE Asian Solid State Circuits Conference (A-SSCC) pages:49-52
Conference: Asian Solid State Circuits Conference (A-SSCC) location:Kaohsiung, Taiwan date:10-12 November 2014
Article number: 4-5
Abstract: This paper demonstrates a wide supply range multiply-accumulate datapath block in 28nm UTBB FD-SOI technology. Variability and leakage reduction strategies are employed in this new technology to achieve a state-of-the-art low energy performance. The design uses a wide range of supply voltages to reduce energy consumption per operation. The extensive back-gate biasing range allows to adapt the minimum energy point (MEP) of the circuit to the desired workload. Measurements showcase the speed/energy trade-off of both the design and the technology and lead to a MEP of 0.17pJ at 35MHz with a supply voltage of 250mV and a back-gate bias of 0.5V.
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors

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