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Title: Amorphous Silicon Surface Passivation of Wafers Bonded to Glass for Thin Heterojunction Back Contact Solar Cells
Other Titles: Amorf silicium passivatie van dunne heterojunctie achterzijde-gecontacteerde zonnecellen gebonden aan glas
Authors: Granata, Stefano Nicola; R0252368
Issue Date: 21-Nov-2014
Abstract: The climate change observed in the last few years encouraged the development of fossil fuel-free energies, such as photovoltaic (PV) and wind power. However, the diffusion of PV is still limited by the high manufacturing cost and low energy conversion efficiency of PV cells and modules. A strategy to overcome this issue is the fabrication of PV cells using kerf-loss-free wafers that are thinner than the one currently commercialized. In this way, a significant amount of silicon can be saved, decreasing the cost and increasing the efficiency of PV module. The implementation of thin wafers into standard solar cell (and module) manufacturing flow is challenging: thin wafers break more easily than thick wafers, and an increased breakage rate can lower considerably the manufacturing yield. An answer to this problem is provided by the interdigitated interconnected (i2)-module proposed by IMEC. The i2-module is an amorphous/crystalline silicon heterojunction interdigitated back-contact (a-Si:H/c-SI HJ i-BC) module fabricated on thin (40 μm) wafers while bonded to thick (0.7-3 mm) substrates. Specifically, the frontside of the i2-module cell is processed a cell level while the rear side of the wafer is bonded to a silicon substrate by means of a porous silicon layer. The rear side of the i2-module cell is processed at module-level while the wafer is already partially encapsulated in the module glass by means of a silicone-based adhesive. In this way, the thin wafers are mechanically supported during manufacturing: the dependency of the breakage rate on the wafer thickness is eliminated. In the i2-module, the rear side of the cell(s) is processed monolithically on wafers / silicone / glass stacks. The introduction of the glass and silicone at an early stage of the manufacturing process, i.e., prior to rear side processing, imposes constraints to the fabrication flow. In the current thesis, the constraints imposed by the glass and silicone on the process of module-level amorphous silicon (a-Si:H) surface passivation are investigated. The a-Si:H passivation process includes the steps of wet cleaning and a-Si:H Plasma Enhanced Vapor Deposition (PECVD), and the interactions between the glass and silicone with these two steps are investigated separately. Equally, the impact of these interactions on the passivation performances are studied. The presence of glass during wet cleaning does not influence significantly the passivation process. Conversely, the presence of glass during a-Si:H PECVD causes a shift in wafer temperature and electric potential. These two effects can be easily eliminated by modification of the PECVD parameters, obtaining passivation quality similar or, potentially, superior to the one obtained on freestanding wafers. The presence of silicone during the passivation process leads to multiple effects, and these are: 1) silicone-based contamination of the wafer surface during wafer bonding; 2) challenging wet cleaning of the bonded wafer and 3) thermal- and plasma-induced silicone degradations during a-Si:H PECVD. As a result of these effects, the quality of the a-Si:H surface passivation in presence of silicone is compromised. Thus, silicone treatments after bonding and before wet cleaning and a-Si:H PECVD are investigated in order to remove the silicone-based contamination and increase silicone resilience to thermal- and plasma- induced degradation. These treatments are: 1) an additional outgassing of the wafer / silicone / glass stack during the bonding step, whose temperature and time are adjusted to the geometry of the sample and to the subsequent thermal steps; 2) an O2 or Ar plasmas performed in a Reactive Ion Etching (RIE) reactor in order to increase the silicone resilience toward processing and 3) a wet cleaning sequence able to remove the surface contamination of the wafer without attacking the silicone. As a consequence of these treatments, the interactions between the glass, the silicone and the passivation process are eliminated and excellent passivation comparable to the one obtained on freestanding wafers are measured on wafer / silicone / glass stacks (surface recombination velocities below 3 cm/s). Furthermore, an i2-module proof-of-concept (POF) using thick (180 μm) wafers is fabricated and the performances of the freestanding and bonded POFs are compared. Comparable averages Vocs of approximately 660±10 mV are obtained on the freestanding and bonded POFs, confirming at device level the excellent passivation measured on test structures.
Table of Contents: Acknowledgments
Abstract
Benopkte Samenvatting
1 - Introduction
2 - Background Knowledge
3 - Layer Transfer Devices
4 - Module-level passivation and characterization of bonded wafers
5 - Influence of glass on a-Si:H passivation of bonded wafers
6 - Influence of silicone on cleaning of bonded wafers
7 - Influence of silicone on a-Si:H PECVD of bonded wafers
8 - Solutions for excellent a-Si:H surface passivation of bonded wafers
9 - Study of the in-situ protective layer
10 - Proof-of-Concept
11 - Summary and Perspectives
Bibliography
Appendices
List of Publications
ISBN: 978-94-6018-918-0
Publication status: published
KU Leuven publication type: TH
Appears in Collections:ESAT - ELECTA, Electrical Energy Computer Architectures

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