ITEM METADATA RECORD
Title: Design Techniques for CMOS RF Power Amplifiers
Other Titles: Ontwerptechnieken voor CMOS RF vermogenversterkers
Authors: François, Brecht; M0318196
Issue Date: 13-Jan-2015
Description: Recently, themobilemarket has grown tremendously and mobile devices have become
ubiquitous and indispensable in our daily life. This introduced a new era for themobile
market where the main focus is to reduce the cost and power consumption of battery
supplied devices.
The power amplifier is a key component in all wireless communication systems. In
most of today’s smartphones and other mobile devices, the RF Power Amplifier
is predominantly designed in a more exotic technology. To reduce the cost and
environmental footprint, it is desirable to completely integrate the RF PA and the
entire transceiver into a single system-on-chip (SoC). In addition, the new wireless
and mobile communication standards introduce new challenges for fully-integrated
power amplifiers. One major challenge is the efficient generation of a Watt-level
output power despite the low-breakdown voltage in nanometer scale technologies. As
the voltage dropswith the technology scaling, not only the output power and efficiency, but also the stringent requirements on linearity become significantly harder. Certainly, due to the increased data rate, high linearity over instantaneous wide bandwidth is needed in future mobile communication standards.
Unlike analog and RF circuitry, digital circuits benefit from technology scaling.
Therefore, if a PA is used in switched mode, voltage linearity is not required. A
switched-mode PA (SMPA) cannot amplify amplitude modulated (AM) signals, but
using techniques such as pulse width modulation (PWM), the amplitude information
can be encoded in the time domain and hence efficiently amplified.
This thesis manuscript addresses the major challenges of integrating linear and
simultaneously highly efficient PAs and PA architectures in standard nanometer
technologies in the frequency range from 900 MHz to 5 GHz. In total, four different PAs have been designed: two linear RF PAs, one linear RF PA with integrated power detector and finally a reconfigurable digital RF PA. All RF PAs are designed to cope with several major challenges for fully-integrated RF PA design.

The first linear PA is a two-stage power amplifier with a clover-shaped distributed active transformer (DAT) combiner in a standard 90 nm CMOS technology targeting
the LTE-communication standard. This test chip achieves the required Watt-level
output power for all modern mobile communication standards: an output power of
29.4 dBm is delivered to the antenna with 25.8% power added efficiency (PAE).
The RF PA was evaluated with a 10 MHz 16-QAM LTE uplink signal with 7 dB
PAPR for LTE-band VIII in the 900-MHz range. Experimental results show that all
stringent linearity requirements are satisfied with 15%PAE at an average output power
of 25.1 dBm, which is more than the required 23 dBm average output power level.
Due to the implementation of a linearity improvement technique, the second RF PA,
fabricated in a 180 nm SOI RF PA, is highly linear even over a wide instantaneous
bandwidth. This high linearity over a wide bandwidth is required for all future mobile
communication standards. The performance of the RF PA is observed for a 64-QAM
20 MHz LTE-advanced uplink signal (PAPR=8.8 dB). This second RF PA delivers a
22.4 dBm with 21.7% PAE, while simultaneously obey all linearity requirements. In
addition, the RF PA achieves similar performance at LTE-band I (1.9 GHz) up till
LTE-band VII (2.5 GHz) The high linearity of the RF PA allows to transmit a LTE-advanced uplink signal even up to a 60 MHz instantaneous bandwidth with a 10.3 dB
PAPR efficiently.
Since the power amplifier is the most power hungry building block in a transmitter, the third linear RF PA is integrated together with an on-chip power detector in a 40 nm standard CMOS technology. The on-chip power detector detects both the RF output current and the RF output voltage to monitor the output power of the RF PA and hence is able to measure the output power even for non-fixed 50 Ohm load. The power detector introduces a sense winding to measure the RF output current. The RF PA is a single stage RF PA using transformer-based input and output matching to support the 5 GHz WLAN IEEE802.11ac communication standard. With continuous wave signals, the RF PA achieves 38.8%PAE and a drain efficiency of 49.9%at a 24 dBm output power. With a 40 MHz 64-QAM WLAN signal at 5 GHz, the RF PA transmits 16.9 dBm while operating with 17.3% efficiently. Finally, a burst-mode RF transmitter was presented to achieve efficiency enhancement.

A fully-integrated Burst Mode transmitter has been realized using aforementioned
fully integratedWatt-level RF PA togetherwith a baseband PWMmodulator processed
in 65 nm standard CMOS, designed by P. Nuyts. During Burst-Mode operation,
the RF PA operates always in saturation. And at 930 MHz, it has a gain of
31 dB at low duty cycles and drops to 29 dB at peak output power. It implies
that the variation over the whole duty cycle range is limited to 2 dB. This proves the inherent linear behavior of the burst mode amplifier. At 100% duty cycle, the power amplifier delivers a peak output power of 28.8 dBm with 23.7% PAE. While applying a 20 MHz WLAN IEEE802.11b/g to the PA, the RF PA achieves 11.7% PAE at 23.1 dBm average output power, where the EVM limit is reached. The
transmitter clearly satisfies the industry-based LTE EVM specification of 5.6% for output powers ranging from about 14 to 23 dBm. This proved the potential for a single chip design.

Consequently, a fourth single chip fully-integrated reconfigurable multilevel PWM transmitter was designed in a 40 nm standard CMOS. To fully-digital multi-level RF PA is implemented in a 40 nm standard CMOS process to generate a multi-level PWM signal and at the same time achieve the required watt-level output power for modern mobile systems. This RF PA architecture uses transformer-based series power combiner to sum the output power of several power amplifiers. Due to the multi-mode operation, simulations show still 3.5 times more efficiency at 15 dB back-off than a conventional Class B amplifier. Simultaneously, this multi-mode RF PA extends the dynamic range by 15 dB and hence doesn’t constrain this digital transmitter architecture to modulated signals with only low PAPR. Due to technical issues, experiments could never confirm the multi-level operation nor the 3.5 times more efficiency than a conventional Class B at 15 dB back-off.
Table of Contents: Abstract vi
Table of Contents ix
List of Figures xv
List of Tables xxix
List of symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxxi
List of abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxxii
1 Introduction 1
1.1 Wireless communication . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Towards full CMOS integration . . . . . . . . . . . . . . . . . . . . . 2
1.3 The Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Targets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.5 Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Mobile Communication systems and RF Power Amplification 13
2.1 Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Power Amplifier metrics and design challenges . . . . . . . . . . . . 14
2.2.1 Output Power, Input Power and Gain . . . . . . . . . . . . . 15
2.2.2 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.3 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
x TABLE OF CONTENTS
2.3 Power Amplifier Classification . . . . . . . . . . . . . . . . . . . . . 27
2.3.1 Class A and Class B . . . . . . . . . . . . . . . . . . . . . . 29
2.3.2 Reduced conduction angle Amplifier . . . . . . . . . . . . . . 33
2.3.3 Switching Amplifiers . . . . . . . . . . . . . . . . . . . . . . 37
2.3.4 PA architectures with multiple RF paths . . . . . . . . . . . . 47
2.3.5 PA architectures with a RF path and an envelope path . . . . . 60
2.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3 Impedance Transformation and Power Combining 69
3.1 Impedance Transformation . . . . . . . . . . . . . . . . . . . . . . . 69
3.1.1 ImpedanceMatching . . . . . . . . . . . . . . . . . . . . . . 70
3.1.2 Impedance transformation networks . . . . . . . . . . . . . . 76
3.2 Power combining . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
3.2.1 Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
3.2.2 Transformer-based power combining . . . . . . . . . . . . . 92
3.2.3 Analysis of Figure-8 shaped Transformer Combined Power
Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
3.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4 Digital Polar 111
4.1 Burst-Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . 112
4.1.1 Transmitter efficiency . . . . . . . . . . . . . . . . . . . . . 115
4.1.2 Two-level burst-mode . . . . . . . . . . . . . . . . . . . . . 116
4.1.3 Multi-level burst mode . . . . . . . . . . . . . . . . . . . . . 120
4.1.4 Multi-level burst mode with square wave carrier . . . . . . . . 131
4.1.5 Proof of concept: two-level burst mode operation . . . . . . . 133
4.1.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
4.2 RF Pulse Width Modulation (RF PWM) . . . . . . . . . . . . . . . . 144
4.2.1 Coding efficiency of RF PWM . . . . . . . . . . . . . . . . . 147
4.2.2 Coding efficiency of Multi-level RF PWM . . . . . . . . . . 152
4.2.3 Extension of Dynamic Range for RF PWM transmitters . . . 156
4.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
5 Design of a linear fully-integrated Watt-level RF PA for LTE and
LTE-advanced 162
5.1 Design of a fully-integrated CMOS RF PA with Clover-shaped series
power combiner for LTE-band VIII . . . . . . . . . . . . . . . . . . . 163
5.1.1 Why LTE? . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
5.1.2 LTE requirements and expectations . . . . . . . . . . . . . . 164
5.1.3 DAT-Based Power Amplifier Design . . . . . . . . . . . . . . 168
5.1.4 Silicon Implementation . . . . . . . . . . . . . . . . . . . . . 173
5.1.5 Simulation results . . . . . . . . . . . . . . . . . . . . . . . . 174
5.1.6 Measurement setup . . . . . . . . . . . . . . . . . . . . . . . 175
5.1.7 Experimental results . . . . . . . . . . . . . . . . . . . . . . 176
5.2 Design of a highly linear fully-integratedwideband RF PA in standard
180 nm SOI for LTE-advanced . . . . . . . . . . . . . . . . . . . . . 182
5.3 LTE-advanced: Carrier Aggregation . . . . . . . . . . . . . . . . . . 184
5.4 Harmonic circuitry to enhance linearity and efficiency . . . . . . . . . 186
5.5 Silicon Implementation . . . . . . . . . . . . . . . . . . . . . . . . . 191
5.6 Measurement results . . . . . . . . . . . . . . . . . . . . . . . . . . 192
5.6.1 Measurement setup . . . . . . . . . . . . . . . . . . . . . . . 192
5.6.2 Experimental results . . . . . . . . . . . . . . . . . . . . . . 193
5.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204
6 A fully-digital reconfigurable CMOS RF PA architecture for digital
polar with efficiency enhancement at power back-off 208
6.1 A CMOS Burst-Mode Transmitter with Watt-Level RF PA and
Flexible Fully Digital Front-End . . . . . . . . . . . . . . . . . . . . 210
6.1.1 System Architecture and Implementation . . . . . . . . . . . 210
6.1.2 Digital Upconverter . . . . . . . . . . . . . . . . . . . . . . . 211
6.1.3 Power Amplifier . . . . . . . . . . . . . . . . . . . . . . . . 211
6.1.4 Measurement Results . . . . . . . . . . . . . . . . . . . . . . 212
6.1.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
6.2 A fully-digital reconfigurable CMOS RF PWM RF PA architecture in
40 nm CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
6.2.1 Targets and design considerations . . . . . . . . . . . . . . . 220
6.2.2 Digital Modulator . . . . . . . . . . . . . . . . . . . . . . . . 225
6.2.3 Multi-level RF PA . . . . . . . . . . . . . . . . . . . . . . . 230
6.2.4 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . 247
6.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
7 Design of a transformer-based fully-integrated power amplifier with
on-chip true power detector 255
7.1 Design of a transformer-based true power detector and 5GHz RF PA
forWLAN IEEE802.11ac in 40nm CMOS . . . . . . . . . . . . . . . 258
7.1.1 Power Detection Methodology . . . . . . . . . . . . . . . . . 258
7.1.2 Sense Winding . . . . . . . . . . . . . . . . . . . . . . . . . 260
7.1.3 Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264
7.1.4 Operational Amplifier . . . . . . . . . . . . . . . . . . . . . 265
7.1.5 RF PA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
7.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 268
7.2.1 Measurement setup . . . . . . . . . . . . . . . . . . . . . . . 268
7.2.2 Measurement results . . . . . . . . . . . . . . . . . . . . . . 269
7.2.3 Future design improvements . . . . . . . . . . . . . . . . . . 278
7.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
8 Conclusion 283
8.1 Major contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
8.2 Overview Silicon Implementations . . . . . . . . . . . . . . . . . . . 286
8.3 Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
8.3.1 Toward efficiency at power back-off . . . . . . . . . . . . . . 289
8.3.2 Toward linearity improvement . . . . . . . . . . . . . . . . . 290
8.3.3 Towards Multi-mode . . . . . . . . . . . . . . . . . . . . . . 291
8.3.4 Towards fully digital . . . . . . . . . . . . . . . . . . . . . . 292
8.3.5 Towards complete multi-standard front-end . . . . . . . . . . 293
8.3.6 Towards 5G . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
Bibliography 295
Index 309
Biography 311
List of publications 312
ISBN: 978-94-6018-952-4
Publication status: published
KU Leuven publication type: TH
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors

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