ITEM METADATA RECORD
Title: CMOS Circuitry for Low Power Ring-based Silicon Photonics Optical Link
Other Titles: CMOS circuits voor een laag vermogen ring gebaseerde silicium optische link
Authors: Rakowski, Michal
Issue Date: 27-Nov-2014
Abstract: In the near future, Tb/s-class aggregate bandwidth input/output (I/O) circuits will be needed for high-end performance computing systems. A high-performance I/O using optical transmission technology is being considered to overcome the limitation of a conventional electrical I/O in terms of data rate per channel, a bandwidth per millimeter and power consumption. A silicon photonics technology is very promising candidate to realized Tb/s-class aggregate I/O bandwidth with improved energy efficiency targeting cost-effective short-range optical links. The main focus in this work is put on CMOS circuitry design to enable low power and high speed optical link between two packages. On the transmitter side of the optical link, energy efficient CMOS driver circuit was co-designed with silicon ring modulator to maximize optical modulation amplitude and to reduce insertion loss. The receiver circuit, designed as a chain of inverted-based stages allows to amplify and convert current pluses detected by a germanium photodiode to usable voltage. The models of the key silicon photonics devices: ring modulator and germanium photodiode allowed to improve the CMOS circuit design targeting the highest energy efficiency. The models of the optical active devices as well as grating couplers, silicon waveguide and fibers were implemented in Verilog-A allowing co-simulation with the CMOS circuits. Thanks to that the complete CMOS silicon photonics link was simulated in a single environment. To demonstrate optical transmission silicon photonics die was integrated with co designed CMOS chip by a standard flip-chip technique. The silicon photonics chip containing optical active and passive devices was fabricated in imec¬ís 200mm pilot line using a subset of 130nm CMOS processing modules. The demonstrator allow to transmit and received data via optical link at 10Gb/s and 20Gb/s. Measured power consumption on the complete optical transceiver showed very good agreement when compared with the simulations results.
Table of Contents: Acknowledgments i
Abstract iii
Samenvatting v
Abbreviations vii
List of symbols ix
Contents xi
1 Introduction 1
1.1 Problem description . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Optical interconnect . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Silicon photonics . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3.1 Ring-based optical link . . . . . . . . . . . . . . . . . . 6
1.4 Research objective and contribution . . . . . . . . . . . . . . 8
1.5 Outline of the thesis . . . . . . . . . . . . . . . . . . . . . . . 10
2 Optical transmitter 13
2.1 System level parameters . . . . . . . . . . . . . . . . . . . . . 14
2.2 Ring modulator . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.1 Electrical model . . . . . . . . . . . . . . . . . . . . . 20
2.2.2 Electro-optical model . . . . . . . . . . . . . . . . . . 22
2.2.3 Parameters extraction . . . . . . . . . . . . . . . . . . 24
2.2.4 Model verification . . . . . . . . . . . . . . . . . . . . 27
2.3 CMOS driver circuit . . . . . . . . . . . . . . . . . . . . . . . 30
2.3.1 Cathode stage . . . . . . . . . . . . . . . . . . . . . . 31
2.3.2 Anode stage . . . . . . . . . . . . . . . . . . . . . . . . 33
2.3.3 Simulation results . . . . . . . . . . . . . . . . . . . . 34
2.4 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 37
3 Optical receiver 39
3.1 Receiver parameters . . . . . . . . . . . . . . . . . . . . . . . 40
3.2 Photodetector . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3.3 Transimpedance amplifier . . . . . . . . . . . . . . . . . . . . 45
3.3.1 Design requirements . . . . . . . . . . . . . . . . . . . 45
3.3.2 TIA architecture . . . . . . . . . . . . . . . . . . . . . 46
3.3.3 Technology contains . . . . . . . . . . . . . . . . . . . 49
3.4 TIA design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.4.1 Simulation results . . . . . . . . . . . . . . . . . . . . 55
3.4.2 Auxiliary circuits . . . . . . . . . . . . . . . . . . . . . 62
3.5 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 64
4 Silicon photonics optical link 67
4.1 Modeling framework . . . . . . . . . . . . . . . . . . . . . . . 67
4.2 Optical link . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.3 Simulation results . . . . . . . . . . . . . . . . . . . . . . . . 72
4.4 Power budget . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.4.1 Ring modulator thermal tuning . . . . . . . . . . . . . 81
4.4.2 Driver energy efficiency . . . . . . . . . . . . . . . . . 82
4.4.3 Optical link efficiency . . . . . . . . . . . . . . . . . . 84
4.5 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 88
5 Optical transmitter demonstrator 91
5.1 CMOS chip design . . . . . . . . . . . . . . . . . . . . . . . . 91
5.1.1 Building blocks . . . . . . . . . . . . . . . . . . . . . . 91
5.1.2 On-chip data source . . . . . . . . . . . . . . . . . . . 92
5.2 CMOS test chip verification . . . . . . . . . . . . . . . . . . . 96
5.2.1 PRBS block . . . . . . . . . . . . . . . . . . . . . . . . 97
5.2.2 Driver measurement . . . . . . . . . . . . . . . . . . . 98
5.3 Transmitter demonstrator . . . . . . . . . . . . . . . . . . . . 100
5.3.1 Electrical evaluation . . . . . . . . . . . . . . . . . . . 101
5.3.2 Electro-optical measurements . . . . . . . . . . . . . . 102
5.4 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 108
6 CMOS transceiver chip 111
6.1 CMOS chip overview . . . . . . . . . . . . . . . . . . . . . . . 111
6.2 Silicon photonics die overview . . . . . . . . . . . . . . . . . . 113
6.3 Transmitter side design . . . . . . . . . . . . . . . . . . . . . 115
6.3.1 On-chip data distribution . . . . . . . . . . . . . . . . 116
6.3.2 20Gb/s driver design . . . . . . . . . . . . . . . . . . . 117
6.4 Receiver side design . . . . . . . . . . . . . . . . . . . . . . . 119
6.4.1 20Gb/s TIA design . . . . . . . . . . . . . . . . . . . . 120
6.5 Designed test structures . . . . . . . . . . . . . . . . . . . . . 122
6.5.1 Receiver test structures . . . . . . . . . . . . . . . . . 122
6.5.2 Thermal control side . . . . . . . . . . . . . . . . . . . 124
6.6 CMOS test chip verification . . . . . . . . . . . . . . . . . . . 124
6.6.1 On-chip data source . . . . . . . . . . . . . . . . . . . 124
6.6.2 Ring modulator drivers . . . . . . . . . . . . . . . . . 126
6.6.3 Receiver test structures . . . . . . . . . . . . . . . . . 127
6.7 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 130
7 Optical transceiver demonstrator 133
7.1 Wire-bonded photodiode . . . . . . . . . . . . . . . . . . . . . 133
7.1.1 TIA current bias . . . . . . . . . . . . . . . . . . . . . 135
7.1.2 TIA sensitivity . . . . . . . . . . . . . . . . . . . . . . 136
7.1.3 Receiver with digital output . . . . . . . . . . . . . . . 139
7.1.4 Performance measurement . . . . . . . . . . . . . . . . 141
7.2 Flip-chip integration . . . . . . . . . . . . . . . . . . . . . . . 144
7.2.1 Tx10Gb/s characterization . . . . . . . . . . . . . . . 144
7.2.2 Tx20Gb/s characterization . . . . . . . . . . . . . . . 147
7.2.3 Receiver characterization . . . . . . . . . . . . . . . . 151
7.3 Summary and conclusions . . . . . . . . . . . . . . . . . . . . 154
8 Conclusion 159
8.1 Bitrate and energy efficiency . . . . . . . . . . . . . . . . . . 161
8.2 Future research . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Appendix A Silicon ring modulator model 167
A.1 Verilog-A code listing . . . . . . . . . . . . . . . . . . . . . . 167
A.2 Different ring modulator . . . . . . . . . . . . . . . . . . . . . 168
Appendix B Ge-photodiode model 171
B.1 DC characterization . . . . . . . . . . . . . . . . . . . . . . . 172
B.2 High-speed characterization . . . . . . . . . . . . . . . . . . . 174
B.3 Optical behavior . . . . . . . . . . . . . . . . . . . . . . . . . 177
B.4 Verilog-A code listing . . . . . . . . . . . . . . . . . . . . . . 181
Bibliography 183
List of Publications 195
Curriculum Vitae 201
ISBN: 978-94-6018-911-1
Publication status: published
KU Leuven publication type: TH
Appears in Collections:Associated Section of ESAT - INSYS, Integrated Systems
ESAT - MICAS, Microelectronics and Sensors

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