Proceedings of the 2014 International Symposium on Circuits and Systems pages:1772-1775
ISCAS location:Melbourne date:1-5 June 2014
This paper proposes a novel integrated oscillator topology based on a transmission line. The frequency is extracted from the delay of the transmission line, which is intrinsically independent of temperature and supply variations. The architecture for the oscillator, guidelines for the design of the transmission line as well as the different building blocks are presented. The architecture is based on a phase-locked loop topology. The transmission line used has a 509 ps delay, an area of 2.26 mm2 and a 4.38 dB power loss. The effect of process variations on the transmission line is extensively investigated. A digital driver using CMOS inverters and an analog driver based on an OTA are proposed. Both have a good stability over temperature. The Gilbert cell is proposed as a detector at the output of the transmission line and the corresponding design considerations are shown. Closed loop simulations show fast locking, a variation of 8.3‰ between -10◦ C and 85◦C and a variation of 3.7‰ for Vdd ± 10%.