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Keywords:

Science & Technology, Technology, Engineering, Electrical & Electronic, Nanoscience & Nanotechnology, Engineering, Science & Technology - Other Topics

Abstract:

A single transistor 1T-DRAM, also called Floating-Body RAM cell (FBRAM) makes use of the transistor floating body as a charge storage node. Nowadays, it has become of high interest because it overcomes the integration problems associated with the capacitor of the conventional 1T/1C DRAM. In order to improve the retention time and sense margin, the parasitic BJT (Gen2) programming shows the best performance compared to the other operating methods and allows further scaling to fully depleted devices [1]. However, in deeply scaled devices, the retention time is one of the main concerns for the future generations of DRAM cells. The goal of this work is to investigate the floating body as a function the gate length using the BJT with a positive back bias programming and to identify the dominant mechanism behind the retention time degradation, which could be a show stopper for FBRAM scaling. © 2012 IEEE.