Electrical properties of Low-V-T metal-gated n-MOSFETs using La2O3/SiOx as interfacial layer between HfLaO high-kappa dielectrics and Si channel

Chang, SZ; Yu, HY; Adelmann, C; Delabie, A; Wang, XP; Van Elshocht, S; Akheyar, A; Nyns, Laura; Swerts, J; Aoulaiche, Marc; Kerner, C; Absil, P; Hoffmann, TY; Biesemans, S

doi:10.1109/LED.2008.919780

Electrical properties of Low-V-T metal-gated n-MOSFETs using La2O3/SiOx as interfacial layer between HfLaO high-kappa dielectrics and Si channel

Author:

Chang, SZ

Yu, HY ; Adelmann, C ; Delabie, A ; Wang, XP ; Van Elshocht, S ; Akheyar, A ; Nyns, Laura ; Swerts, J ; Aoulaiche, Marc ; Kerner, C ; Absil, P ; Hoffmann, TY ; Biesemans, S

Keywords:

HfLaO, La2O3/SiOx interfacial layer (IL), low-V-T n-MOSFETs, Ta2C, Science & Technology, Technology, Engineering, Electrical & Electronic, Engineering, 0906 Electrical and Electronic Engineering, Applied Physics, 4009 Electronics, sensors and digital hardware

Abstract:

In this letter, we report that by employing the La2 O3/SiOx interfacial layer between HfLaO La = 10%) high-κ and Si channel, the Ta2C metal-gated n-MOSFETs VT can be significantly reduced by ∼350 mV to 0.2 V, satisfying the low-VT device requirement. The resultant n-MOSFETs also exhibit an ultrathin equivalent oxide thickness ∼1.18 nm) with a low gate leakage (JG = 10 mA/cm2 at 1.1 V), good drive performance (Ion = 900 μA/μm at Isoff = 70 nA/μm), and acceptable positive-bias-temperature-instability reliability. © 2008 IEEE.