IEEE International Solid-State Circuits Conference: Digest of technical papers vol:56 pages:186-187
International Solid-State Circuits Conference location:San Francisco, CA date:17-21 February 2013
There is a growing interest in implementing on-chip reference clock generators for low-cost low-power area-efficient SoCs, such as implantable biomedical devices and microcomputers. Relaxation oscillators are suitable candidates to generate such reference clocks due to their compact size, low power consumption and wide frequency tuning range. However, the poor phase noise performance and large long-term variation are two major problems that limit their application.