Title: Technology Integration of GaN-on-Si HEMTs for Power Electronics Applications (Integratie van technologie van GaN-op-Si HEMTs voor vermogenselektronica toepassingen)
Other Titles: Technology Integration of GaN-on-Si HEMTs for Power Electronics Applications
Authors: Srivastava, Puneet
Issue Date: 10-Jul-2012
Abstract: In this PhD thesis, GaN-on-Si HEMTs (high electron mobility transistors) have been studied. III-N materials (GaN, AlGaN, AlN) are very useful sy stems to be used at high voltage and under high ambient temperature owin g to their excellent intrinsic properties, such as wide band gap and low intrinsic carrier concentration. The III-N hetero-structure (AlGaN/GaN) leads to the formation of a 2-DEG (two dimensional electron gas) with h igh carrier density, high mobility and high saturation velocity which ca n be utilized to realize an efficient compact power conversion system. G aN-on-Si HEMTs are cost effective solutions but in the scope of this PhD , it is sketched out that the parasitic conduction across the AlN/Si int erface leads to device breakdown voltage saturation after a certain gate -drain distance. This saturation could be elevated by using thick buffer s on Si; however, growing thick buffers are problematic due to the large lattice and thermal mismatch between III-N and Si. In this PhD work, novel Si substrate removal approaches to terminate the AlN/Si interface conduction to enhance the breakdown voltage of AlGaN/G aN/AlGaN-DHFETs has been studied extensively. Various technological appr oaches starting from ‘Global Si substrate removal (GSSR)’-to-‘Local Si r emoval between S-to-D contacts (LRSD)’-to- ‘Si trench around drain conta ct (STAD)’ have been developed. After Si removal, a linear increase in t he breakdown voltage with the gate-drain distance is measured compared t o a saturated breakdown voltage on Si. A breakdown voltage of over ~ 200 0 V is measured for a gate-drain distance of 20 μm and a buffer thi ckness of only 2 μm. The main thrust from GSSR-to-LRSD-to-STAD is d riven by enhancing device thermal performance. In case of a STAD device (compared to a GSSR or a LRSD device), the Si substrate is still under t he gate-region where the maximum heat is generated which helps to dissip ate the generated heat; confirmed by electrical measurements and thermal simulations. It is presented that after Si removal, devices have un-alt ered threshold voltages (VTH); confirming no change in 2-DEG channel pro perties. Other advantages of Si substrate removal include: (1) high volt age operation under high ambient temperature is possible compared to the devices with Si and (2) the device breakdown voltage is independent of the buffer thickness leading to ~ 2000 V breakdown for a sub-micron thin (600 nm) AlGaN buffer layer. Therefore optimization of thin buffers followed by Si substrate removal is one of the most attractive solutions towards obtaining low cost, high yield and high manufacturability of GaN power devices fabricated on Si substrates.
Publication status: published
KU Leuven publication type: TH
Appears in Collections:Associated Section of ESAT - INSYS, Integrated Systems
Semiconductor Physics Section

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