Pairing 2012, Date: 2012/05/16 - 2012/05/18, Location: Cologne, Germany
Publication date:
2013-01-01
Volume:
7708
Pages:
141 -
159
ISSN:
978-3-642-36334-4
Publisher:
Springer
Lecture Notes in Computer Science
Author:
Ghosh, Santosh
Verbauwhede, Ingrid ; Roychowdhury, Dipanwita
Keywords:
cosic
Abstract:
This paper presents an efficient implementation of optimalate pairing over BN curves. It exploits the highly optimized IP cores available in modern FPGAs to speed up pairing computation. The pipelined datapaths for F p -operations and suitable memory cores help to reduce the overall clock cycle count more than 50%. The final design, on a Virtex-6 FPGA, computes an optimal-ate pairing having 126-bit security in 0.375 ms which is a 32% speedup from state of the art result. © Springer-Verlag Berlin Heidelberg 2013.