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Title: Implementation of high-k and metal gate materials for the 45 nm node and beyond: gate patterning development
Authors: Beckx, S
Demand, M
Locorotondo, S
Henson, K
Claes, M
Paraschiv, V
Shamiryan, D
Jaenen, P
Boullart, W
De Gendt, Stefan
Biesemans, S
Vanhaelemeersch, S
Vertommen, J
Coenegrachts, B #
Issue Date: Jan-2005
Publisher: Pergamon-elsevier science ltd
Series Title: Microelectronics reliability vol:45 issue:5-6 pages:1007-1011
Abstract: We report on gate patterning development for the 45 nm node and beyond. Both poly-Si and different metal gates in combination with medium-k and high-k dielectrics have been defined. Source/drain silicon recess has been characterized for different stacks, yielding optimised processes for all investigated. Using hardmask based etching allowed us to produce sub-20 nm poly-Si and metal gates. Implementation of advanced metal gate patterning in already developed multigate field effect transistors (MuGFET) devices has been demonstrated. (c) 2004 Elsevier Ltd. All rights reserved.
ISSN: 0026-2714
Publication status: published
KU Leuven publication type: IT
Appears in Collections:Molecular Design and Synthesis
# (joint) last author

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