Ultra clean processing of silicon surfaces v vol:92 pages:19-22
In future IC-generations high-k materials will replace silicon oxide as the gate dielectric. Prior to the introduction of these new materials into wet FEOL processing, their etching and deposition behavior should be examined closely. This requires the availability of an accurate analysis procedure. In this work the parameters for a (VPD-DC)TXRF measurement procedure are examined. This procedure is subsequently applied to the investigation of the dissolution and deposition behavior of the high-k materials. The dissolution of high-k material decreases when thermal budget of the post deposition treatment increases. Concerning deposition, it is shown that neutrality during cleaning or rinsing has to be avoided. Two mechanisms are responsible for the observed deposition. One is the limited solubility of the hydrous (high-k)-oxide, especially at a neutral pH, the other is competition between the H+- and metal ions in an adsorption reaction with the surface silanol-groups.