IEEE Journal of Solid-State Circuits vol:46 issue:5 pages:1223-1230
2010 IEEE Radio Frequency Integrated Circuits Symposium Anaheim, CA, MAY 23-25, 2010
Dual-gate organic transistor technology is used to increase the robustness of digital circuits as illustrated by higher inverter gains and noise margins. The additional gate in the technology functions as a V-T-control gate. Both zero-V-GS-load and diode-load logic are investigated. The noise margin of zero-V-GS-load inverter increases from 1.15 V (single gate) to 2.8 V (dual gate) at 20 V supply voltage. Diode-load logic inverters show an improvement in noise margin from similar to 0 V to 0.7 V for single gate and dual gate inverters, respectively. These values can be increased significantly by optimizing the inverter topologies. As a result of this optimization, noise margins larger than 6 V for zero-V-GS-load logic and 1.4 V for diode-load logic are obtained. Functional 99-stage ring oscillators with 2.27 mu s stage delays and 64 bit organic RFID transponder chips, operating at a data rate of 4.3 kb/s, have been manufactured.