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Title: Ni-FUSI on high-k as a candidate for 65nm LSTP CMOS
Authors: Kubicek, S
Veloso, A
Anil, KG
Hayashi, S
Yamamoto, K
Mitsuhashi, R
Kittl, Jorge
Lauwers, A
Van Dal, M
Horii, S
Harada, Y
Kubota, M
Niwa, M
De Gendt, Stefan
Heyns, Maureen
Jurczak, M
Biesemans, S #
Issue Date: 2005
Publisher: Ieee
Host Document: 2005 IEEE VLSI-TSA International Symposium on VLSI Technology (VLSI-TSA-TECH), Proceedings of Technical Papers pages:99-100
Conference: International Symposium on VLSI Technology, Systems and Applications location:Hsinchu, Taiwan date:25-27 April 2005
Abstract: We show for the first time that full Ni silicidation (Ni-FUSI) of poly gates in combination with Hf based gate dielectrics meets the required device performance for the 65nm LSTP technology node. Important device parameters, like C-inv, mobility and drive currents exhibit significant improvement without compromising the oxide integrity and reliability. The drive of nMOS and pMOS transistors for the V-DD = 1.1V at 10pA/mu m off state leakage is 575 mu A/mu m and 1650 mu A/mu m respectively.
ISBN: 0-7803-9058-X
Publication status: published
KU Leuven publication type: IC
Appears in Collections:Department of Materials Engineering - miscellaneous
Molecular Design and Synthesis
Semiconductor Physics Section
# (joint) last author

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