Journal of the electrochemical society vol:153 issue:8 pages:F180-F187
The implementation of HfO2 gate dielectrics in sub-45 nm devices requires optimization of nanometer-thin HfO2 layers, deposited, e.g., by atomic layer deposition (ALD). In this work, we optimize ALD conditions such as precursor pulse time and deposition temperature for HfO2 layers with physical thicknesses below 2 nm. Additionally, we investigate intermediate treatments in the ALD reaction cycle, such as exposure to gas-phase moisture or remote plasma at low temperature and thermal anneals. Such intermediate treatments affect both growth-per-cycle (GPC) and Cl-impurity content of the HfO2 layers. The analysis of the process modifications allows a better understanding of the reaction mechanisms. H2O pulse times of 10 s must be applied to achieve saturation in GPC and Cl content. Using saturated H2O pulses decreases the gate leakage current in the sub-1 nm equivalent oxide thickness (EOT) range. The GPC is enhanced from similar to 1.8 Hf/nm(2) for conventional ALD to 4 Hf/nm(2) for intermediate plasma treatments at low temperature. Intermediate anneals reduce the Cl content by about two orders of magnitude. Sufficient hydroxylation of the HfO2 surface is one important factor controlling electrical properties in the sub-1 nm EOT range. The reduction of the Cl content does not systematically improve the electrical properties. (c) 2006 The Electrochemical Society.