Title: Integrating high-k dielectrics: etched polysilicon or metal gates?
Authors: Schram, T
Beckx, S
De Gendt, Stefan
Vertommen, J
Lee, S #
Issue Date: Jan-2003
Publisher: Pennwell publ co
Series Title: Solid state technology vol:46 issue:6 pages:61-64
Abstract: There is an immediate, need for reduced gate leakage/higher capacitance gate stacks for stand-by low power applications. For high-performance applications, where leakage is less of a restraining factor, the motivation for the introduction of high-k dielectrics predominantly comes from the manufacturability difficulties of sub-1.0nm SiO2-based dielectric layers. In response-to these challenges, conventionally etched HfO2-based polysilicon and TaN-gated NMOS devices, featuring gate lengths down to 65nm, have been fabricated, and functional HfO2-based transistors, both with polysilicon and metal gate electrodes, have been demonstrated. The results showed the viability of etching high-k dielectric gate stacks in a single chamber using standard processing equipment.
ISSN: 0038-111X
Publication status: published
KU Leuven publication type: IT
Appears in Collections:Molecular Design and Synthesis
# (joint) last author

Files in This Item:

There are no files associated with this item.

Request a copy


All items in Lirias are protected by copyright, with all rights reserved.

© Web of science