Title: 4+1-transistor pixel architecture for high-speed, high-resolution CMOS image sensors
Authors: Xhakoni, Adi ×
San Segundo Bello, David
De Wit, Pieter
Gielen, Georges #
Issue Date: 27-Oct-2011
Publisher: Institution of Electrical Engineers
Series Title: Electronics Letters vol:47 issue:22 pages:1221-1223
Abstract: A pixel architecture is introduced which allows a drastic reduction of the column capacitance of a monolithic pixel array. It consists of a classic 4T pixel architecture together with an extra switch added at regular positions in the column array and shared by a group of pixels of the column. In this way, each pixel will see an output capacitance proportional to the number of pixels sharing the extra switch and the total number of extra switches.
ISSN: 0013-5194
Publication status: published
KU Leuven publication type: IT
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors
× corresponding author
# (joint) last author

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