Proceedings of the IEEE Energy Conversion Congress & Exposition pages:3234-3241
IEEE Energy Conversion Congress & Exposition location:Phoenix date:17-22 September 2011
A fully integrated high power density capacitive 2:1 step-down DC-DC converter is designed in a standard Bulk CMOS technology. The implemented converter can deliver a maximum output power of 1.65W on a chip area of 2.14mm2, resulting in a power conversion density of 0.77W/mm2. Besides the primary goal of high power density a peak power conversion efficiency of 69% is achieved. This for a voltage step-down conversion from twice the nominal supply voltage of a 90nm technology (2Vdd = 2.4V) to 1V. Both the design as the implementation techniques to achieve the resulting power density, are discussed.