Author:

Keywords:

thermal-oxidation, gate dielectrics, Science & Technology, Physical Sciences, Technology, Electrochemistry, Materials Science, Coatings & Films, Materials Science, THERMAL-OXIDATION, 0303 Macromolecular and Materials Chemistry, 0306 Physical Chemistry (incl. Structural), 0912 Materials Engineering, Energy, 3406 Physical chemistry, 4016 Materials engineering

Abstract:

To boost MOS transistor performance, thickness of the gate dielectric is continuously scaled down. This results in an increase of gate tunneling leakage current, which at some point prevents further downscaling. Desired parameters of alternative materials to SiO2 are a higher dielectric constant (high-k materials), stability, and compatibility with silicon. A general observation for one of the prime candidates, HfO2, is formation of an interfacial layer between the silicon and the high-k material that limits scalability because of its low k-value. Hence, a thorough study of the formation of this layer and its contribution to the equivalent oxide thickness is of utmost importance. We studied the composition and growth kinetics of the interfacial layer formed during the deposition of HfO2 by metallorganic chemical vapor deposition using O-2 and tetrakis-diethylamidohafnium as precursor. We found the composition and thickness of the interfacial layer to be dependent on the deposition parameters as well as on the starting surface. The layer's composition is hafnium silicate-like and its thickness increases as a function of deposition time and temperature. It is therefore controlled by deposition of the HfO2 layer. (C) 2004 The Electrochemical Society.