Author:

Keywords:

Science & Technology, Technology, Computer Science, Hardware & Architecture, Computer Science, Software Engineering, Computer Science, design, process variation, parametric yield, variability compensation, 0803 Computer Software, 1006 Computer Hardware, Design Practice & Management, 4009 Electronics, sensors and digital hardware, 4606 Distributed computing and systems software, 4612 Software engineering

Abstract:

Process variability and the dynamism of new applications increase the uncertainty of embedded systems and force designers to use pessimistic assumptions, which have a tremendous impact on both the performance and energy consumption of their memory organizations. In this article we introduce an experimental framework which tries to mitigate the effects of both sources of unpredictability. At compile time, an extensive profiling helps us to detect system scenarios and bounds application dynamism. At the organization level, we incorporate a heterogeneous memory architecture composed by several configurable memories. A calibration process and a runtime control system adapt the platform to the current application needs. Our approach manages to reduce significantly the energy overhead associated to both variability and application dynamism (up to 60%, according to our simulations) without compromising the timing constraints existing in our target domain of dynamic periodic multimedia applications. © 2008 ACM.