Author:

Keywords:

Science & Technology, Technology, Engineering, Electrical & Electronic, Engineering, BANG-BANG PLLS

Abstract:

RF-powered wireless sensor networks demand for ultra-low-energy A/D converters. Such systems have specific requirements, like fast start-up time and supply voltage independence. The presented A/D converter is based on a digital phase locked loop. Two closely matched ring oscillators perform the analog to frequency conversion. The digital output is generated by an in-loop digital proportional-integral filter. The acquisition of the PLL is splitted into coarse and fine tuning to reduce the locking time to less than 30µs. A UMC130 CMOS technology is used to simulate a temperature sensor interface. The energy consumption is maximally 212 pJ per conversion and the effective number of bits is 7 bit in a 0.5 V-1.4 V supply voltage range.