Title: Quantification of Drain Extension Leakage in a Scaled Bulk Germanium PMOS Technology
Authors: Eneman, Geert ×
De Jaeger, Brice
Simoen, Eddy
Brunco, David P
Hellings, Geert
Mitard, Jerome
De Meyer, Kristin
Meuris, Marc
Heyns, Marc M #
Issue Date: Dec-2009
Publisher: Institute of Electrical and Electronics Engineers
Series Title: IEEE Transactions on Electron Devices vol:56 issue:12 pages:3115-3122
Abstract: This paper is the first to quantify drain extension leakage in a sub-100-nm gate-length bulk germanium technology. Leakage through the transistor's extension/halo junction is shown to be the dominant leakage component in a scaled transistor layout. Optimizing halo and extension implants to improve short-channel control further increases the extension leakage. As a consequence, drain-to-bulk leakage in Ge pFETs is likely 4 x 10(-7) A/mu m or higher for an L-G = 70-nm pMOS technology with good short-channel control at a supply voltage of 1 V. The weak thermal sensitivity of the extension leakage points to a band-to-band tunneling (BTBT) mechanism, which leads to only 40%-50% increase of the extension leakage between 25 degrees C and 100 degrees C. As BTBT depends exponentially on the electric field across the junction, lowering the supply voltage below 0.7 V can lead to drain leakages below 1 x 10(-7) A/mu m.
ISSN: 0018-9383
Publication status: published
KU Leuven publication type: IT
Appears in Collections:Associated Section of ESAT - INSYS, Integrated Systems
× corresponding author
# (joint) last author

Files in This Item:

There are no files associated with this item.

Request a copy


All items in Lirias are protected by copyright, with all rights reserved.

© Web of science