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Title: Efficient Reliability Simulation of Analog ICs Including Variability and Time-varying Stress
Authors: Maricau, Elie
Gielen, Georges #
Issue Date: 24-Apr-2009
Host Document: DATE: 2009 Design, Automation & Test in Europe Conference & Exhibition vol:1-3 pages:1238-1241
Conference: DATE location:Nice date:20-24 april 2009
Abstract: Aggressive scaling to nanometer CMOS technologies causes both analog and digital circuit parameters to degrade over time due to die-level stress effects (i.e. NBTI, HCI, TDDB, etc). In addition, failure-time dispersion increases due to increasing process variability.

In this paper an innovative methodology to simulate analog circuit reliability is presented. Advantages over current state of the art reliability simulators include, among others, the possibility to estimate the impact of variability and the ability to account for the effects of complex time-varying stress signals.
Results show that taking time-varying stress signals into account provides circuit reliability information not visible with classic DC-only reliability simulators. Also, variability-aware reliability simulation results indicate a significant percentage of early circuit failures compared to failure-time results based on nominal design only.
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - MICAS, Microelectronics and Sensors
# (joint) last author

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