ITEM METADATA RECORD
Title: A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation
Authors: Tiri, K.
Verbauwhede, Ingrid #
Issue Date: 2004
Publisher: IEEE
Host Document: Design, Automation and Test in Europe (DATE 2004) pages:246-251
Conference: DATE 2004 date:February 16-20, 2004
URI: 
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - COSIC, Computer Security and Industrial Cryptography (+)
# (joint) last author

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