Title: Architectural optimization for a 1.82 Gbits/sec VLSI implementation of the AES Rijndael algorithm
Authors: Kuo, H.
Verbauwhede, Ingrid
Issue Date: 2001
Publisher: Springer
Host Document: Lecture Notes in Computer Science vol:2162 pages:51-64
Conference: CHES 2001 date:May 14-16, 2001
ISSN: 0302-9743
Publication status: published
KU Leuven publication type: IC
Appears in Collections:ESAT - COSIC, Computer Security and Industrial Cryptography (+)

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