IEEE International Solid-State Circuits Conference, Date: 2008/02/01 - 2008/02/01
Publication date:
2008-02-01
Volume:
51
Pages:
560 -
561
ISSN:
9781424420100
Publisher:
IEEE
Digest of Technical Papers
Author:
Chowdhury, Debopriyo
Reynaert, Patrick ; Niknejad, Ali M
Abstract:
A 60GHz two-stage 1V differential PA is designed in 90nm CMOS. It uses compact transformers for input, output, and interstage matching and has an area of 660×380μm2. It achieves a 1dB compressed output power of 9dBm and a saturated power of 12.3dBm. Peak drain efficiency is 32% and peak PAE is 8.8%. The power gain at 60GHz is 5.5dB with 3dB bandwidth exceeding 22GHz. ©2008 IEEE.