IEEE Journal on Solid-State Circuits vol:33 issue:12 pages:1887-1897
The design of a low-voltage and low-power Delta Sigma analog-to-digital (A/D) converter is presented. A third-order single-loop Delta Sigma modulator topology is implemented with the differential modified switched op-amp technique. The modulator topology has been transformed as to accommodate half-delay integrators. Dedicated low-voltage circuit building blocks, such as a class AB operational transconductance amplifier, a common-mode feedback amplifier, and a comparator are treated, as well as low-voltage design techniques. The influence of very low supply voltage on power consumption is discussed. Measurement results of the 900-mV Delta Sigma A/D converter show a 77-dB dynamic range in a 16-kHz bandwidth and a 62-dB peak signal-to-noise ratio for a 40-mu W power consumption.